Flat Assembler is a fast and efficient self-assembling 80x86 assembler. It supports x86 and x86-64 instruction sets with MMX, 3DNow!, SSE up to SSE4, AVX, AVX2, and XOP extensions. It can produce output in binary, MZ, PE, COFF, or ELF format. It includes powerful but easy-to-use macroinstruction support and does multiple passes to optimize the instruction codes for size. It is written entirely in assembly language.
|Tags||Software Development Assemblers Compilers Utilities Other/Nonlisted Topic education|
|Operating Systems||Windows MS-DOS POSIX Linux BSD|
Release Notes: This release implements many new instruction sets, including AVX, AVX2, FMA, FMA4, XOP, BMI, TBM, HLE, and RTM. Half-precision floating point numbers are now supported. The "rept" directive has been extended to allow calculating the values of numerical expressions during the preprocessing stage. It is now possible to generate dynamically-linked ELF executables directly, without linking. The "assert" directive and "relativeto" operator have been added.
Release Notes: Full support for SSE4, SVM, and SMX instruction set extensions has been added. Ability to generate Portable Executable files for UEFI has been introduced. Several other smaller additions and fixes concluding the 1.67.x development line were included in this milestone release.
Release Notes: The optional output of symbolic information was added, and the tools that allow you to extract data from this file and show it in a human-readable form are provided. Several minor fixes and enhancements were applied at the same time.
Release Notes: 32-bit relocations are now allowed in PE64 output format. EIP-relative addressing was added. The PLT operator was added for the ELF output format. SSSE3 (Supplemental SSE3) instructions were added. Some Win64 headers and examples were provided in the Windows package. The SYSRETQ mnemonic was added, and RDMSRQ/WRMSRQ/SYSEXITQ mnemonics were added for the 64-bit variants of respective instructions. R8L-R15L (Intel-style) aliases were added for R8B-R15B registers. Support for the AMD SVM technology instructions was added. Numerous bugs were fixed.
Release Notes: Support was added for outputting the 32-bit address relocations in case of 64-bit object formats. The PE formatter now automatically detects whether code and data addresses should be relocatable. The instructions of the SVM extension of the AMD architecture have been implemented.