Release Notes: Bugfixes and new Graphviz import feature (currently Linux-only).
Release Notes: This release implements VHDL test bench export and initial versions of SCXML export and vvvv Automata code export. It has overhauled documentation and a Russian translation. There are some bugfixes.
Release Notes: Logic statements and vectors are supported in VHDL export. Dialog windows were ported to Qt 4. An online error check was added. Protocol output in integrity check was added. Minor bugs were fixed in VHDL export, image export, and state table generation.
Release Notes: This release updates documentation, adds Windows-specific enhancements and an NSIS installer, ports to Qt4 using Qt3 support classes, enhances VHDL export functionality, optimizes integrity checks, adds a PNG exportation function, and fixes several minor bugs.
Release Notes: The file qfsm.pro has been updated to allow building with qmake. There are various improvements in the autotools-based build system. The environment variable $QFSM_DIR no longer needs to be set at execution time, i.e. files are installed to /usr/bin, /usr/share/qfsm, /usr/share/doc, etc.
Release Notes: This release adds an SVG and EPS file export function and fixes some minor bugs.
Release Notes: English user documentation was written. The possibility of default transition was introduced. Ragel file export was added. The input condition "any" was introduced. The possibility to invert transition conditions was introduced. More arrow types were added. The "Free Text" type was added. The "print header" option was added.
Release Notes: This release adds ASCII state table export, modifies the way that IO ranges are split in state table export, fixes some Verilog HDL export bugs, adds an option to draw a box around inputs/outputs over transitions, adds intput/output name display over transitions and in state tables, adds an option to display asynchronous outputs in state tables, removes compiler warnings due to iostream etc., and fixes a compilation bug.
Release Notes: Export functions and visual appearance have been improved. A French translation has been added.
Release Notes: VHDL export was improved, and Verilog HDL export was added. Problems with FreeBSD and compilation under GCC 3.x were fixed. It is now possible to assign a version string to a machine and descriptions to states and transitions.