127 projects tagged "Electronic Design Automation (EDA)"

Download Website Updated 25 Sep 2007 tkgate

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Pop 120.77
Vit 6.81

TkGate is an event-driven digital circuit simulator with a TCL/Tk-based graphical editor. It supports a wide range of primitive circuit elements and user-defined modules for hierarchical design. The distribution comes with a number of tutorial and example circuits which can be loaded through the "Help" menu, and the example circuits include a simple CPU, programmed to run the Animals game. TkGate has multi-lingual support for English, Japanese, French, German, Spanish, Welsh, and Catalan.

No download Website Updated 02 Oct 2003 ViPEC

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Pop 43.37
Vit 6.35

VIPEC is an network analyser for electrical networks. It takes a description of an electrical network, and performs a simulation of the circuit response in the frequency domain. Output is in the form of 2-port parameters, and can be plotted on a grid and in Smithchart format. VIPEC supports various lumped circuit elements, as well as elements like transmission lines and 2-port data files.

No download Website Updated 15 Jul 2010 BOUML

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Pop 117.88
Vit 6.27

BOUML is a UML 2 tool box that allows you to specify and generate code in C++, Java, IDL, and PHP. BOUML is very fast and doesn't require much memory to manage several thousands of classes. BOUML is extensible, and the external tools (named plug-outs) can be written in C++ or Java, using BOUML for their definition as any other program. UML models can be exported to HTML pages, including PNG or SVG graphics.

Download Website Updated 10 Jun 2011 Platform Independent Petri Net Editor

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Pop 75.12
Vit 5.83

Platform Independent Petri Net Editor (PIPE) creates and analyses Petri Nets quickly, efficiently, and effectively. A key design feature is the modular approach adopted for analysis, enabling new modules to be written easily and powerfully, using built-in data layer methods for standard calculations. Six analysis modules are provided, including Invariant Analysis, State-Space Analysis (deadlock, etc.), and Simulation Analysis and Classification. PIPE adheres to the XML Petri net standard (PNML). The file format for saving and loading Petri Nets is extensible through the use of XSLT, the default being PNML.

No download Website Updated 18 May 2012 Scheture

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Pop 65.86
Vit 5.68

Scheture is a hierarchical schematic capture system with built-in netlisters for Spice and Verilog. It has built-in plotting for Postscript, HP PCL and HP GL/2 printers and plotters. It includes a set of symbol primitives, and allows user-defined symbol primitives to allow for extensive customization of primitive properties. The system supports wire buses and iterated instances. The system also supports global pins and implicitly connected pins on a specific sheet. Supported platforms include Solaris and Linux (32- and 64-bit).

Download Website Updated 11 Feb 2007 SoC GDS

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Pop 61.07
Vit 5.66

SoC GDS is a platform for enabling hierarchical SoC integration and verification across traditional EDA frameworks based on Virtual Components per the VSIA guidelines. It is also a fast viewer and processor for native GDSII files. It encompasses a set of powerful functions allowing automatic cell renaming, grid verifications, GDS II files merging (AND), physical comparison (XOR), hierarchy modifications, and conversion to text format.

No download Website Updated 21 Jun 2010 ngspice

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Pop 76.68
Vit 5.61

Ngspice is a mixed-level/mixed-signal circuit simulator based on three open source software packages: Spice3f5, Cider1b1, and Xspice. Spice3 is the most famous and widely used circuit simulator. Cider is mixed-level simulator that includes Spice3f5 and adds DSIM, a device simulator. Cider couples the circuit level simulator to the device simulator to provide greater simulation accuracy (at the expense of greater simulation time). Xspice is an extension to Spice3 that provides code modeling support and simulation of digital components through an embedded event driven algorithm.

Download Website Updated 08 Aug 2011 BeRTOS

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Pop 106.35
Vit 5.14

BeRTOS is a real time operating system (RTOS) suitable for embedded platforms. It runs on many microprocessors and microcontrollers, ranging from 8-bit to 32-bit CPUs and even PCs.

Download Website Updated 11 Apr 2011 ACL2

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Pop 73.10
Vit 4.91

ACL2 is a mathematical logic, programming language, and mechanical theorem prover based on the applicative subset of Common Lisp. It is an "industrial-strength" version of the NQTHM or Boyer/Moore theorem prover, and has been used for the formal verification of commercial microprocessors, the Java Virtual Machine, interesting algorithms, and so forth.

Download Website Updated 13 Aug 2005 THUD

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Pop 17.06
Vit 4.65

THUD is a register transfer level (RTL) simulation environment optimized for cycle- based designs. The design is expressed in TH, a Scheme-based hardware description language (HDL) that supports 1/0/x operators and hierarchical instantiation. THUD can be used as a library, in batch mode, or through one of its interactive interfaces.

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bb_log

A fast and tiny logger for Java.

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CorneliOS

A virtual Web OS.