SIMD Viterbi Decoder provides library functions to decode certain popular error correction codes. This version supports two codes: a rate 1/2, constraint length 7 (r=1/2, k=7) code, and an r=1/2, k=9 code. Four implementations of each decoder are provided. One is in portable C and should run in any GNU C environment. The other three use the IA32 SIMD (single instruction, multiple data) instruction sets: MMX, SSE, and SSE2. The SSE version of the k=7 decoder executes at ~9 megabits/sec on a 1GHz Pentium-III.
This library implements a general-purpose encoder/decoder for Reed-Solomon error correcting codes. The decoder supports erasures. The user can specify the parameters for any size code, limited only by machine resources. Hard-coded routines for the CCSDS-standard (255,223) code are also included.
DSP implements several low-level digital signal processing (DSP) primitives accelerated, when available, by the Intel/AMD SIMD instruction sets MMX/SSE/SSE2. Portable C versions are provided for compatibility on non-IA32 machines. Routines are provided to compute 16-bit integer dot products (FIR filtering, correlation); sum-of-squares (signal energy measurement), and peak sample detection (for automatic gain control, etc.).